The present disclosure relates generally to the field of semiconductor devices, and more particularly, to apparatus and methods for controlling the power requirements of memories.
The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. The scaling of IC techniques to the nanometer regime has increased power dissipation. The increased power dissipation causes several problems including reducing battery life in mobile systems, expensive packaging and cooling solutions and can also result in chip failures. Of the various factors contributing to power dissipation, power dissipation due to leakage or static power dissipation is rising and is predicted to exceed dynamic power dissipation in the near future.
Passive power gating has helped to reduce the power dissipation in memories. A conventional power gating circuit consists of a header driver coupled to a header consisting of multiple transistors. During an active mode, the header driver turns on the transistors of the header to provide driving currents to a memory. During a deep sleep mode, the header driver turns off the transistors of the header. During a data retention mode, the transistors of the header function as diodes and the header driver controls the transistors to maintain a lower internal supply voltage level.